Measures of Progress Membership Engagement Kim McMahon Director

Measures of Progress Membership Engagement Kim McMahon Director of Marketing, RISC-V International

RISC-V Measures of Progress

More than 1,000 RISC-V Members 4 Systems 85 Chip across SoC, 50IP,Countries FPGA 3 I/O 12 Industry Memory, network, storage Cloud, mobile, HPC, ML, automotive 11 Services 56 Research Fab, design services Universities, Labs, other alliances 35 Software 500 Individuals Dev tools, firmware, OS October 2020 ODM, OEM RISC-V developers and advocates In 2020, RISC-V membership has grown by more than 60% 3

In 2020 alone RISC-V driving industry change 2,100 individuals in 47 RISCV work groups and committees, nearly triple the RISC-V groups and 54% increase in participation 259 RISC-V solutions online including cores, SoCs, software, tools and developer boards. 70% growth in 28 local meetup groups, with more than 4,000 engineers added 8,000 followers on social media and have participated in 100 news articles along with We’re in the news! We’ve amplifying RISC-V community news

RISC-V Technical Steering Committee to govern technical strategy, build technical leadership and best practice decision-making RISC-V Learn encompassing university curricula, online learning and Training Partners RISC-V Ambassadors and Alliances to reach beyond our community for industry collaboration, leadership, and technical engagement. RISC-V Exchange to showcase RISC-V cores, SoCs, developer boards, software, tools and other resources. RISC-V International Launched in 2020

2020 Technical Progress Development process and deliverables are done with transparency. Technical Steering Committee brings industry best practice governance. Ratified two more specifications Set up a security response process Initiated compliance framework and test Launched the legal committee Welcomed Mark Himelstein, RISC-V CTO Developing RISC-V building blocks

Industry innovation on RISC-V Hardware Hardware – RV32, privilege modes, interrupts – Hardware Complexity – RV32 – Hardware ISA Definition Test Chips Proof of Concept SoCs Minion processors for power management, communications, Software Tests Software Bare metal software 2010 – 2016 2017 – 2018 IoT SoCs Microcontrollers Software RTOS Firmware 2019 – 2020 – RV64, multi-heart CPUs, vectors, bit manipulation, hypervisors, debug mode – AI SoCs Application processors Software Linux Drivers AI Compilers 2021

2020 Visibility Progress 38 events ranging from HPC and Embedded World in Europe to DAC and Open Source Summit in North America, to regional events in China and Taiwan. 378 blogs, announcements, and press briefings generating 9,244 mentions in the press. Launched RISC-V Ambassador to support engineering leadership with 7 Ambassadors around the world. Welcomed Kim McMahon, RISC-V Director of Marketing. Amplifying RISC-V progress

Membership What it means and what you get!

Benefi t of joining RISC-V Accelerate technical traction and insight Contribute technical priorities, approaches, and code Gain strategic and technical advantage Increase visibility, leadership, and market insight Fill and increase engineering skills, retain and attract talent Build innovation partner network and customer pipeline Deepen, engage, and lead in local and industry developer network Showcase RISC-V products, services, training, and resources

Membership Options Premier Member Benefits Strategic Member Benefits Community Member Benefits Premier Requirements Membership open to any type of legal entity, not open to individual members 250k Annual membership fee that includes Board seat and TSC seat 100k Annual membership fee that includes TSC seat Strategic Member Requirements Membership open to any type of legal entity, not open to individual members Annual membership fee based on employee size 5,000 employees 35k 500-5,000 employees 15k 500 employees 5k Community Requirements Membership open to academic institutions, non-profits, and individuals not representing a legal entity No annual membership fee Community level benefits plus Board seat and Technical Steering Committee seat included for 250k level Technical Steering Committee seat included for 100k level Summit speaker session Solution provider listing 2 blogs per month 2 social media spotlights per month Spotlight member profile Inclusion in event promotions Community level benefits plus Use of RISC-V Trademark for commercialization 3 Board reps elected for tier, includes Premier members that do not otherwise have a board seat. Eligible to lead workgroup and/or committee Solution provider listing 1 blog per month 1 social media spotlight per month Accelerated development, reduced risk through open source, ratified ISA. Eligible to participate in workgroups, influence strategy and adoption 6 support programs in Technical Deliverables, Compliance, Visibility, Learning, Advocacy, and Marketplace 1 voting Academic Board rep, 1 non-voting Community Board rep Member logo / name listing in website Event registration discount

Engagement

Technical Working Groups The technical groups are the heart of RISC-V. These groups create and maintain the hardware ISA and other items around it, including test and debug frameworks, software specs, and other technical artifacts. Visit our Working Groups page to learn more. Note: Membership is required to participate in many of the working groups. Group/Meeting Responsibilities Technical Steering Committee (TSC) Delegation of responsibilities to organizational components below it, strategy, escalations, group & chair & preliminary charter approvals, ratification. voting (most discussion and notification by email, web page listing and supporting docs, automated voting system). Convene meetings as needed. Chief Technology Office (CTO) Runs TSC voting process, LSM & TCM, Strategy, organization, IT, roadmap, resources, escalations, ISA Committees (IC) Approve and oversee package for TSC vote for the creation of ISA Extension TGs and filling the chair and vice-chair vacancies for its TGs. Strategy for the groups under it, complete coverage of areas of responsibility under it. Horizontal Committees (HC) Approve and oversee non-extension TGs, and has responsibilities to make sure that all Extension TGs cover the area overseen by the HC before ratification, Responsible for developing a holistic strategy and reaching out to the external ecoystem and community groups. Horizontal Subcommittees (HSC) It is a nested HC. Task Groups (TG) Must have charter that define deliverable work products: extension specifications, standards, requirements, best practices, etc. TGs under the unpriv and priv SC can have ISA extension work products. TGs under HCs should not have ISA extension work products. Special Interest Groups (SIG) Topic discussion. No work product. Can be created by the TSC, ICs or HCs with TSC approval not required.

Marketing Working Groups Participate in the marketing committee to engage with your peers, learn about member marketing benefits, and contribute. Note: Membership is required to participate in many of the working groups. Marketing Committee Primary communication tool with members on RISC-V marketing initiatives. Meetings: 2nd Tuesday of the month, 8am PT (5pm CEST) Marketing Content Task Group Discuss content topics such as website, exchange, and research. Meetings: Last Tuesday of the month: 8am PT (5pm CEST) Marketing Events Task Group Discuss upcoming events and actions as well as event plans for future Meetings: Every other Thursday: 9am PT (6pm CEST)

How to Engage with RISC-V Members: Working Groups Member Portal: lists.riscv.org - members-only mailing lists RISC-V Wiki: wiki.riscv.org - organized information about all working groups GitHub Organization: github.com/riscv - code and document repositories Group Calendars: via Google calendar (links on wiki) Public: Public Discussion Lists: riscv.org/technical/technical-forums via Google Groups Community Events: community.riscv.org - formal & informal meeting points RISC-V Exchange marketplace: riscv.org/exchange

RISC-V Content Your one stop for RISC-V Content! RISC-V News Blogs Community News RISC-V Announcements RISC-V YouTube Twitter LinkedIn RISC-V Slack

RISC-V Exchange The RISC-V Exchange provides a window into work that people have accomplished around the world in the RISC-V community, including physical hardware, IP cores, and a great deal of software. Available Boards Available Cores & SoCs Available Software

Tech Wiki - wiki.riscv.org

GitHub - github.com/riscv

RISC-V Training Partners RISC-V Training Partners are focusing on RISC-V training in a professional setting. The Training Partner Program extends the breadth and reach of RISC-V knowledge, providing opportunities for a broader audience to learn. See our Training Partner page for more information on our training partners or how to become a RISC-V Training Partner.

RISC-V Learn Learning RISC-V is a challenging, highly rewarding activity. There are many resources available to help you on this technical journey, and we welcome new additions to these resources – please contact us at [email protected] with any questions or comments. The Training Partner Program puts you in touch with global organizations who provide professional training. There are several books on RISC-V available. The Educational Materials list is a collection of open curricula from academic institutions around the world, in several languages. Google Scholar provides an extensive and growing list of academic publications related to RISC-V

RISC-V is a community of passionate, dedicated, and invested stakeholders As individuals As companies As universities As public institutions and nonprofits As nations As one Global, connected movement Build RISC-V into your company strategy, and your personal mission 22

Thank you Questions: [email protected]